1. Field of the Invention
The present invention relates to a digital audio tape recorder apparatus, and is particularly concerned with data compression and expansion used in LP (long play) mode, and with encoding level data in recording and reproducing audio data.
2. Description of the Prior Art
Digital audio tape recorders (hereinbelow also referred to as DAT) using rotary heads have been available in the Japanese market since 1987. The DAT standard is defined in "Standard of Electronic Industries Association of Japan, ELAJ CP-2305, DAT Cassette System Part 1: Dimensions and Characteristics, Established in December 1989, Prepared by Technical Study Committee on DAT, Published by Electronic Industries Association of Japan (Address: 2-2, Marunouchi 3-chome, Chiyoda-ku, Tokyo 100, Japan), printed in Japan" and in International Electrotechnical Committee document "IEC 60A(S)122".
In recording and reproducing audio data, DAT systems have five recording modes. Three of the modes are for 2-channel normal tape speed modes (hereinbelow also referred to as normal mode) in accordance with different sampling frequencies (hereinbelow also referred to as Fs), Fs=48 k, 44.1 k, and 32 kHz. The remaining modes are for 2-channel LP mode and for 4-channel mode.
Recording in LP mode is achieved by rotating the cylindrical heads at half the normal speed and by compressing the incoming 16-bit PCM (pulse code modulation) data, with Fs=32 kHz, into 12-bit data. The compressed data is reexpanded to 16-bit data during the reproducing process. By using this method, 4 hours of audio data can be recorded on a DAT cassette tape which has a 2 hour recording capacity in normal mode.
Hereinbelow will be described a data compression and expansion method used for recording and reproducing audio data in LP mode. Referring to FIG. 1 of the accompanying drawings, this figure shows the data compression and expansion method used between 16-bit PCM data and 12-bit compressed data. The compression method for recording PCM data is as follows:
Sixteen-bit PCM data is compressed into 12-bit data in accordance with a length of bits that is identical to a most significant bit (hereinbelow also referred to as MSB) which is regarded as the sign bit. The 12-bit compressed data has the same MSB as that of the original 16-bit PCM data. The succeeding 3 bits represent how many continuous bits next to the MSB are identical to the MSB. This 3-bit sequence is in regular binary code for MSB="1", and is provided in 2's complement form for MSB="0". The 3-bit binary code represents a bit length up to seven. The remaining 8-bits are the same as those bits of the original 16-bit PCM data which occur after the first bit which is inverse to the MSB, provided that the 8 bits are identical with the lower 8 bits of the original 16-bit PCM data when the upper 8 bits of the 16-bit data and the 12-bit data are all identical to each other. For example, if the incoming 16-bit PCM data is "0000 0100 1101 0110" in MSB to LSB (least significant bit) order (which corresponds to the case on the dotted line in FIG. 1), then the bit length of the number of continuous bits next to the MSB which are identical to the MSB is four. Thus, the results of the 16-bit to 12-bit compression would be "0011 0011 0101" (where "ABCD EFGH" in FIG. 1 corresponds to "0011 0101").
After the incoming 16-bit PCM data is compressed into 12-bit data, each corresponding set of L channel and R channel data is converted into three sets of audio data symbol data. Each set of audio data symbol data consists of 8 bits, as shown in FIG. 2 (where Li and Ri represent the 12-bit compressed data of L channel and R channel at sample i). Liu and Riu are the 8-bit upper symbol data, respectively, and LRil is the 8-bit lower symbol data consisting of the remaining 4 bits of both of the channels. The three sets of symbol data are recorded on a magnetic tape, after the error correction codes have been added by the signal processor means.
Referring now to FIG. 3, this figure shows the data conversion method for converting 16-bit PCM data into 8-bit symbol data during normal mode operation. The incoming 16-bit PCM data is converted into two audio data symbols sets for each channel. Each sets consists of 8 bits (where Liu and Riu are the upper 8 bits of the L channel and R channel data at sample i and Lil and Ril are the lower 8 bits of the L channel and R channel data of sample i, respectively). The four symbol data sets are recorded on a magnetic tape after the error correction codes have been added by the signal processor means.
When reproducing a recorded tape, the DAT system identifies which mode the PCM data was recorded in from the sampling frequency information and quantization information that is recorded as subcode data accompanying the PCM data. If the PCM data was recorded in normal mode (i.e., where the sampling frequency is either Fs=48 k, 44.lk or 32 kHz and quantization is 16 bits uniform), then the reproduced 8-bit symbol data sets are reorganized as 16-bit PCM data, introducing the error correction method (a detailed description of which is omitted in this specification), and are transformed into an analog audio signal by a digital-to-analog converter. If the PCM data was recorded in LP mode (i.e., where the sampling frequency is 32 kHz and the quantization is 12 bits non-uniform), then the reproduced 8-bit symbol data sets are reorganized as 12-bit compressed data thus introducing the error correction method. The 12-bit compressed data is expanded into 16-bit PCM data in accordance with the expansion method shown in FIG. 1. When expanding the 12-bit compressed data into 16 bits, there are some cases where an additional bit should be appended to the lower bits. The mark "*", shown in FIG. 1, marks those bits to be appended. Although the DAT specification EIAJ CP-2305 published by Electronic Industries Association of Japan (EIAJ) does not specify what data should be provided to these bits, it is known that filling such areas with either "01111 . . . " or "10000 . . . " generally realizes lower noise generation caused by the expansion. The expanded 16-bit PCM data is transformed into an analog audio signal by a digital-to-analog converter.
In an attempt to deal with both normal mode recording and LP mode recording, a data compression arrangement in a prior art digital audio tape recorder has been proposed in Laid Open Japanese Patent Application No. HEI 1-314023. According to this patent application, the prior art data compression arrangement comprises a shift register to transform incoming serial data into parallel data; a shift control means which controls the shift clock of the shift register in accordance with the upper N bits of incoming serial data; a data transform means which generates L-bit data in accordance with the upper N bits of incoming serial data, which become the upper L bits of the compressed data; and a selector means for selecting specific output bits of the shift register and of the data transform means in accordance with the system operation mode, which is either normal mode or LP mode. When the system is operating in normal mode, the data compression arrangement outputs 16-bit parallel data to which incoming serial data is transformed, and when the system is operating in LP mode, the data compression arrangement derives 12-bit compressed data combining 4-bit (L=4) data outputted from the data transform means with 8 bits of specified output from the shift register.
A related patent application concerned with the data expansion arrangement in a prior art digital audio tape recorder has also been proposed in laid Open Japanese Patent Application HEI 1-314022. According to this patent application, the prior art data expansion arrangement comprises a selector means to which incoming parallel data and fixed data are provided and which selects specific bits of the incoming parallel data and the fixed data in accordance with the system operation mode; a shift register, to which parallel data selected by the selector means is provided, which transforms the parallel data into serial data by shifting in a LSB-first direction; and a shift control means which controls the shift clock of the shift register in accordance with the upper L bits of the input parallel data from the selector means. When the system is operated in normal mode, 16-bit parallel data is provided to the selector means, and the whole set of bits is input to the shift register means. The shift register means transforms input 16-bit parallel data into serial data. When the system is operated in LP mode, 12-bit parallel data is provided to the selector means. The selector means selects the lower 8 bits of the input 12-bit parallel data and the fixed data and provides them to the shift register means. Also, the upper 4 bits of the input 12-bit parallel data are provided to the shift control means. The shift register shifts the loaded parallel data in accordance with a shift clock controlled by shift control means, and hence expanded data is derived.
There is, however, a problem in the prior art. The prior art data compression and expansion arrangement requires extra shift registers to transform the serial data between LSB-first and MSB-first; or otherwise extra shift control means and extra time slots are required to shift the serial data backwards and forwards within the same shift register. This is because, although the data compression arrangement is operative when the system is operating in a recording mode and the data expansion arrangement is also operative when the system is operating in a reproduction mode, both arrangements (recording and reproducing) share signal processor means for providing processes such as interpolation and mute to the incoming data.
For example, the output of the data expansion arrangement is supplied to the signal processor means before the reproduced data is output, and the input of the data compression arrangement is supplied from signal processor means which have already processed the recording data. Therefore, as far as the data serially processed at the signal processor means, it is preferable that the output format of the data expansion arrangement is the same as the input format of the data compression arrangement. Also, since the shift register in the prior art data compression means is controlled by a shift control means, which controls the shift clock in accordance with the data to be compressed, it is difficult to utilize the shift register for other processes such as encoding level data. Therefore, the overall signal processor arrangement of the prior art digital audio tape recorder is large in circuit scale and the unit cost of the LSI signal processor, including the data compression and expansion arrangements, cannot be reduced sufficiently.
Hereinbelow will be described the level encoder arrangement of a prior art digital audio tape recorder. In recording and reproducing audio data with a DAT system, level data is important information in identifying whether the incoming data is properly recorded and for identifying how large the reproducing signals are. The most popular way to express digital data levels can be realized by deriving the absolute value of each sample data and detecting the peak absolute value over a certain period. The absolute value of digital data can be derived by executing an exclusive-or operation between the MSB and the remainder bits. The level data is generally presented in decibels (dB) and can be derived from the absolute value by applying the following equation: ##EQU1##
For example, with 16-bit PCM data the absolute value of each sampled data will be within "000 0000 0000 0000"-"111 1111 1111 1111" in binary code, or "0000"-"7FFF" in hexadecimal. The resolution of level data using a 15-bit absolute value scheme is uniform and a precise level can be represented in every range.
However, there is a problem that a level encoder arrangement which generates absolute values of 16-bit PCM data requires 2 sets of 15-bit flip-flops for retaining absolute values of L channel and R channel PCM data and control circuits to compare and update such level data. Therefore, the level encoder arrangement is large in circuit scale, and thus the unit cost of the LSI signal processor, including the level encoder arrangement, cannot be reduced sufficiently. Moreover, since the 15-bit level data is transferred to the system controller means via an 8-bit data bus, a large portion of time of the total system control process is required for receiving the 4 bytes of level data and deriving a graphic or numerical display data from them. This operates to limit enhancements to the system function.
In an attempt to deal with these problems, a level encoder arrangement of a prior art digital tape recorder has been proposed in Laid Open Japanese Patent Application SHO 63-109613. This level encoder arrangement alleviates these problems by having the shift register for generating 12-bit compressed data in LP mode also generate compressed level data. This level encoder arrangement also shares the data regarding the bit length of successive bits which are identical to the MSB for both encoding the upper 4 bits of the 12-bit compressed data in LP mode and for encoding the compressed level data. According to this patent application, the level encoder arrangement comprises a shift register, to which N-bit data is provided, which outputs the upper L bits of the input data; a transform pattern detector means for deriving a shift number of the N-bit data provided to the shift register from the L-bit output of the shift register; a timing generator means which receives the shift number information and derives a shift clock for the shift register; and a decibel data generator means which derives the decibel value of the input N-bit data from the output of the shift register.
However, there is still a problem in that the level encoder arrangement of the prior art digital audio tape recorder requires a decibel value generator means which calculates the decibel value of incoming PCM data from the output of the shift register and the bit length data of successive bits identical to the MSB. Therefore, this level encoder arrangement of the prior art digital audio tape recorder is still large in circuit scale and thus the unit cost of the LSI signal processor, including the level data encoder arrangement, cannot be reduced sufficiently. Moreover, the resolution of level data which can be represented by the compressed data in the prior art level encoder is not sufficient to allow using it as a reference for adjusting recording levels and for monitoring reproduced 16-bit digital audio, especially in the range of zero dB, where higher resolution, as much as 0.1 dB, is required.